This invention pertains to data processing memories and more particularly to dynamic memories requiring periodic refreshing.
Dynamic memories use stored charge in capacitors or equivalent charge storing elements to remember the data loaded into their memory cells. The memory cells are so constructed that each read operation of the cells replaces any charge lost through leakage. hence, a read operation "refreshes" the memory cells. However, such refreshing must occur within a certain period of time, called the refresh period, or the information stored in the memory cells will be lost. The internal construction of a dynamic memory is usually a rectangular matrix even if the external organization is linear. For example, a typical 4KXl bit dynamic memory is actually constructed as a 64X64 bit matrix array of memory cells. That is, the memory has 64 column sets and 64 row sets. Aside from an improved geometric form factor, cell selection for reading requires the coincidences of accessing both the row set containing the desired cell as well as the column set containing such cell. In accessing a row set, in effect, each memory is read. In accessing a column set the cells of the column are gated open to pass read data. Thus, it is seen the mere accessing of a single memory cell causes the refreshing not only of that memory cell but all other memory cells in its row set. Hence, if each row set is accessed within the required time, all memory cells will be refreshed. Except in an unbranching continuous program there is never a guarantee that all rows will be accessed in any given period of time. Therefore, a separate mechanism must be provided to perform accesses to all rows within the refresh period.
Typically, during systems operation the memory is periodically withheld from operational access of the central processing unit for the time required to refresh all the memory cells. This is accomlished in a single compact burst wherein the rows are sequentially read. Such a burst lasts only for a small portion of the refresh period, generally in the order of a few percent. However, this few percent not only cuts into the available useful operating time of the system, but more importantly has serious effects during the real time processing which requires access to the memory. For example, certain peripherals of the system require memory via Direct Memory Access at a fixed rate and, therefore, cannot wait for the end of the refresh burst.